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Lbr.h
Go to the documentation of this file.
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#pragma once
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// Constants //
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//
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// Legacy LBR MSRs
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//
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#ifndef MSR_LEGACY_LBR_SELECT
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# define MSR_LEGACY_LBR_SELECT 0x000001C8
// originally defined in SDK to be used by other module like HyperHV
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#endif
// !MSR_LEGACY_LBR_SELECT
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#define MSR_LBR_TOS 0x000001C9
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#define MSR_LASTBRANCH_0_FROM_IP 0x00000680
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#define MSR_LASTBRANCH_0_TO_IP 0x000006C0
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#define MSR_LASTBRANCH_INFO_0 0x00000DC0
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#define LBR_SELECT_WITHOUT_FILTER 0x00000000
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//
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// Arch LBR MSRs
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//
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#define IA32_LBR_0_FROM_IP 0x1500
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#define IA32_LBR_0_TO_IP 0x1600
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#define IA32_LBR_0_INFO 0x1200
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#define CPUID_ARCH_LAST_BRANCH_RECORD_INFORMATION 0x1c
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//
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// This MSR could be used as an alternative to MSR_LBR_SELECT and IA32_DEBUGCTL for enabling and configuring LBR
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// For using that in hypervisor Load Guest IA32_LBR_CTL Entry Control and Clear IA32_LBR_CTL Exit Control should
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// be configured, plus host could control it over Guest IA32_LBR_CTL on VMCS
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//
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#define IA32_LBR_CTL 0x000014CE
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// CPUID Structures //
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/*
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* @brief Intel Architectural LBR CPUID detection/enumeration details:
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*/
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typedef
union
_CPUID28_EAX
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{
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struct
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{
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/* Supported LBR depth values */
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UINT32
LbrDepthMask
: 8;
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UINT32
Reserved
: 22;
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/* Deep C-state Reset */
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UINT32
LbrDeepCReset
: 1;
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/* IP values contain LIP */
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UINT32
LbrLip
: 1;
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};
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UINT32
AsUInt
;
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}
CPUID28_EAX
, *
PCPUID28_EAX
;
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typedef
union
_CPUID28_EBX
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{
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struct
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{
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/* CPL Filtering Supported */
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UINT32
LbrCpl
: 1;
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/* Branch Filtering Supported */
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UINT32
LbrFilter
: 1;
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/* Call-stack Mode Supported */
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UINT32
LbrCallStack
: 1;
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UINT32
Reserved
: 29;
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};
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UINT32
AsUInt
;
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}
CPUID28_EBX
, *
PCPUID28_EBX
;
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typedef
union
_CPUID28_ECX
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{
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struct
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{
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/* Mispredict Bit Supported */
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UINT32
LbrMispred
: 1;
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/* Timed LBRs Supported */
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UINT32
LbrTimedLbr
: 1;
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/* Branch Type Field Supported */
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UINT32
LbrBrType
: 1;
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UINT32
Reserved
: 29;
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};
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UINT32
AsUInt
;
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}
CPUID28_ECX
, *
PCPUID28_ECX
;
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/*
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* @brief The structure to hold the CPUID leaf 0x28 details for Architectural LBRs
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*/
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typedef
struct
_CPUID28_LEAFS
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{
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CPUID28_EAX
Eax
;
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CPUID28_EBX
Ebx
;
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CPUID28_ECX
Ecx
;
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UINT32
Edx
;
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}
CPUID28_LEAFS
, *
PCPUID28_LEAFS
;
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// MSR Structures //
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typedef
union
_IA32_LBR_CTL_REGISTER
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{
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ULONG64
AsUInt
;
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struct
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{
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ULONG64
LBREn
: 1;
// [0] When set, enables LBR recording
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ULONG64
OS
: 1;
// [1] When set, allows LBR recording when CPL == 0
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ULONG64
USR
: 1;
// [2] When set, allows LBR recording when CPL != 0
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ULONG64
CallStack
: 1;
// [3] When set, records branches in call-stack mode (See Section 7.1.2.4)
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ULONG64
Reserved0
: 12;
// [15:4] Reserved (must be zero)
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ULONG64
JCC
: 1;
// [16] When set, records taken conditional branches (See Section 7.1.2.3)
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ULONG64
NearRelJmp
: 1;
// [17] When set, records near relative JMPs (See Section 7.1.2.3)
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ULONG64
NearIndJmp
: 1;
// [18] When set, records near indirect JMPs (See Section 7.1.2.3)
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ULONG64
NearRelCall
: 1;
// [19] When set, records near relative CALLs (See Section 7.1.2.3)
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ULONG64
NearIndCall
: 1;
// [20] When set, records near indirect CALLs (See Section 7.1.2.3)
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ULONG64
NearRet
: 1;
// [21] When set, records near RETs (See Section 7.1.2.3)
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ULONG64
OtherBranch
: 1;
// [22] When set, records other branches (See Section 7.1.2.3)
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ULONG64
Reserved1
: 41;
// [63:23] Reserved (must be zero)
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}
Bits
;
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}
IA32_LBR_CTL_REGISTER
, *
PIA32_LBR_CTL_REGISTER
;
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// Global Variables //
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typedef
struct
_CPU_LBR_MAP
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{
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ULONG
Model
;
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ULONG
LbrCapacity
;
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}
CPU_LBR_MAP
, *
PCPU_LBR_MAP
;
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extern
CPU_LBR_MAP
CPU_LBR_MAPS
[];
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// Functions //
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BOOLEAN
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LbrCheckAndReadLegacyLbrDetails
();
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BOOLEAN
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LbrCheckAndReadArchitecturalLbrDetails
();
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BOOLEAN
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LbrStart
(UINT64 FilterOptions);
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BOOLEAN
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LbrCheck
();
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VOID
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LbrFilter
(UINT64 FilterOptions);
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VOID
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LbrStop
();
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VOID
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LbrFlush
();
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VOID
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LbrSave
();
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VOID
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LbrPrint
();
CPU_LBR_MAPS
CPU_LBR_MAP CPU_LBR_MAPS[]
The global variable to hold the mapping of CPU model to its LBR capacity.
Definition
Lbr.c:21
PCPU_LBR_MAP
struct _CPU_LBR_MAP * PCPU_LBR_MAP
LbrFlush
VOID LbrFlush()
Flush LBR MSRs by disabling LBR and clearing all LBR entries.
Definition
Lbr.c:1041
LbrStart
BOOLEAN LbrStart(UINT64 FilterOptions)
Start collecting LBR branches.
Definition
Lbr.c:903
PCPUID28_ECX
union _CPUID28_ECX * PCPUID28_ECX
IA32_LBR_CTL_REGISTER
union _IA32_LBR_CTL_REGISTER IA32_LBR_CTL_REGISTER
The structure to hold the IA32_LBR_CTL MSR, which is used to enable and configure the LBR feature.
LbrSave
VOID LbrSave()
Save LBR branches.
Definition
Lbr.c:1091
LbrStop
VOID LbrStop()
Stop collecting LBR branches.
Definition
Lbr.c:983
CPUID28_LEAFS
struct _CPUID28_LEAFS CPUID28_LEAFS
PCPUID28_LEAFS
struct _CPUID28_LEAFS * PCPUID28_LEAFS
CPU_LBR_MAP
struct _CPU_LBR_MAP CPU_LBR_MAP
The structure to hold the mapping of CPU model to its LBR capacity.
PCPUID28_EBX
union _CPUID28_EBX * PCPUID28_EBX
CPUID28_EBX
union _CPUID28_EBX CPUID28_EBX
LbrCheckAndReadArchitecturalLbrDetails
BOOLEAN LbrCheckAndReadArchitecturalLbrDetails()
Check if the current CPU supports architectural LBR.
Definition
Lbr.c:86
LbrPrint
VOID LbrPrint()
Print collected LBR branches.
Definition
Lbr.c:1194
PIA32_LBR_CTL_REGISTER
union _IA32_LBR_CTL_REGISTER * PIA32_LBR_CTL_REGISTER
LbrFilter
VOID LbrFilter(UINT64 FilterOptions)
Filter LBR branches based on the provided options.
Definition
Lbr.c:1070
LbrCheckAndReadLegacyLbrDetails
BOOLEAN LbrCheckAndReadLegacyLbrDetails()
Check if the current CPU supports LBR by examining the CPU family and model and looking up the corres...
Definition
Lbr.c:177
LbrCheck
BOOLEAN LbrCheck()
Check if LBR is enabled or not.
Definition
Lbr.c:876
CPUID28_ECX
union _CPUID28_ECX CPUID28_ECX
CPUID28_EAX
union _CPUID28_EAX CPUID28_EAX
PCPUID28_EAX
union _CPUID28_EAX * PCPUID28_EAX
BOOLEAN
UCHAR BOOLEAN
Definition
BasicTypes.h:35
UINT32
unsigned int UINT32
Definition
BasicTypes.h:54
ULONG
unsigned long ULONG
Definition
BasicTypes.h:31
_CPU_LBR_MAP
The structure to hold the mapping of CPU model to its LBR capacity.
Definition
Lbr.h:148
_CPU_LBR_MAP::LbrCapacity
ULONG LbrCapacity
Definition
Lbr.h:150
_CPU_LBR_MAP::Model
ULONG Model
Definition
Lbr.h:149
_CPUID28_LEAFS
Definition
Lbr.h:101
_CPUID28_LEAFS::Edx
UINT32 Edx
Definition
Lbr.h:105
_CPUID28_LEAFS::Eax
CPUID28_EAX Eax
Definition
Lbr.h:102
_CPUID28_LEAFS::Ecx
CPUID28_ECX Ecx
Definition
Lbr.h:104
_CPUID28_LEAFS::Ebx
CPUID28_EBX Ebx
Definition
Lbr.h:103
_CPUID28_EAX
Definition
Lbr.h:53
_CPUID28_EAX::AsUInt
UINT32 AsUInt
Definition
Lbr.h:64
_CPUID28_EAX::LbrLip
UINT32 LbrLip
Definition
Lbr.h:62
_CPUID28_EAX::LbrDeepCReset
UINT32 LbrDeepCReset
Definition
Lbr.h:60
_CPUID28_EAX::LbrDepthMask
UINT32 LbrDepthMask
Definition
Lbr.h:57
_CPUID28_EAX::Reserved
UINT32 Reserved
Definition
Lbr.h:58
_CPUID28_EBX
Definition
Lbr.h:68
_CPUID28_EBX::LbrFilter
UINT32 LbrFilter
Definition
Lbr.h:74
_CPUID28_EBX::Reserved
UINT32 Reserved
Definition
Lbr.h:77
_CPUID28_EBX::LbrCpl
UINT32 LbrCpl
Definition
Lbr.h:72
_CPUID28_EBX::AsUInt
UINT32 AsUInt
Definition
Lbr.h:79
_CPUID28_EBX::LbrCallStack
UINT32 LbrCallStack
Definition
Lbr.h:76
_CPUID28_ECX
Definition
Lbr.h:83
_CPUID28_ECX::LbrMispred
UINT32 LbrMispred
Definition
Lbr.h:87
_CPUID28_ECX::AsUInt
UINT32 AsUInt
Definition
Lbr.h:94
_CPUID28_ECX::LbrBrType
UINT32 LbrBrType
Definition
Lbr.h:91
_CPUID28_ECX::Reserved
UINT32 Reserved
Definition
Lbr.h:92
_CPUID28_ECX::LbrTimedLbr
UINT32 LbrTimedLbr
Definition
Lbr.h:89
_IA32_LBR_CTL_REGISTER
The structure to hold the IA32_LBR_CTL MSR, which is used to enable and configure the LBR feature.
Definition
Lbr.h:117
_IA32_LBR_CTL_REGISTER::OtherBranch
ULONG64 OtherBranch
Definition
Lbr.h:133
_IA32_LBR_CTL_REGISTER::NearRet
ULONG64 NearRet
Definition
Lbr.h:132
_IA32_LBR_CTL_REGISTER::Reserved0
ULONG64 Reserved0
Definition
Lbr.h:126
_IA32_LBR_CTL_REGISTER::AsUInt
ULONG64 AsUInt
Definition
Lbr.h:118
_IA32_LBR_CTL_REGISTER::NearRelCall
ULONG64 NearRelCall
Definition
Lbr.h:130
_IA32_LBR_CTL_REGISTER::NearIndJmp
ULONG64 NearIndJmp
Definition
Lbr.h:129
_IA32_LBR_CTL_REGISTER::NearRelJmp
ULONG64 NearRelJmp
Definition
Lbr.h:128
_IA32_LBR_CTL_REGISTER::Bits
struct _IA32_LBR_CTL_REGISTER::@162044327322241346347142010232260066304104061355 Bits
_IA32_LBR_CTL_REGISTER::OS
ULONG64 OS
Definition
Lbr.h:123
_IA32_LBR_CTL_REGISTER::USR
ULONG64 USR
Definition
Lbr.h:124
_IA32_LBR_CTL_REGISTER::CallStack
ULONG64 CallStack
Definition
Lbr.h:125
_IA32_LBR_CTL_REGISTER::LBREn
ULONG64 LBREn
Definition
Lbr.h:122
_IA32_LBR_CTL_REGISTER::NearIndCall
ULONG64 NearIndCall
Definition
Lbr.h:131
_IA32_LBR_CTL_REGISTER::JCC
ULONG64 JCC
Definition
Lbr.h:127
_IA32_LBR_CTL_REGISTER::Reserved1
ULONG64 Reserved1
Definition
Lbr.h:134
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Lbr.h
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