apm88xxxx.c File Reference

#include "common.h"

Macros
#define	CLOCK_RATE   3125000UL

Functions
BOOLEAN	Uart16550InitializePortCommon (_In_opt_ _Null_terminated_ PCHAR LoadOptions, _Inout_ PCPPORT Port, BOOLEAN MemoryMapped, UCHAR AccessSize, UCHAR BitWidth)
BOOLEAN	Uart16550SetBaudCommon (_Inout_ PCPPORT Port, ULONG Rate, ULONG Clock)
UART_STATUS	Uart16550GetByte (_Inout_ PCPPORT Port, _Out_ PUCHAR Byte)
UART_STATUS	Uart16550PutByte (_Inout_ PCPPORT Port, UCHAR Byte, BOOLEAN BusyWait)
BOOLEAN	Uart16550RxReady (_Inout_ PCPPORT Port)
BOOLEAN	Apm88xxxxInitializePort (_In_opt_ _Null_terminated_ PCHAR LoadOptions, _Inout_ PCPPORT Port, BOOLEAN MemoryMapped, UCHAR AccessSize, UCHAR BitWidth)
BOOLEAN	Apm88xxxxSetBaud (_Inout_ PCPPORT Port, ULONG Rate)

Variables
UART_HARDWARE_DRIVER	Apm88xxxxHardwareDriver

Macro Definition Documentation

CLOCK_RATE

#define CLOCK_RATE   3125000UL

Function Documentation

Apm88xxxxInitializePort()

BOOLEAN Apm88xxxxInitializePort	(	_In_opt_ _Null_terminated_ PCHAR	LoadOptions,
		_Inout_ PCPPORT	Port,
		BOOLEAN	MemoryMapped,
		UCHAR	AccessSize,
		UCHAR	BitWidth )

{
    UNREFERENCED_PARAMETER(AccessSize);
    UNREFERENCED_PARAMETER(BitWidth);
 
    Port->Flags = 0;
    return Uart16550InitializePortCommon(LoadOptions,
                                         Port,
                                         MemoryMapped,
                                         AcpiGenericAccessSizeByte,
                                         32);
}

Apm88xxxxSetBaud()

BOOLEAN Apm88xxxxSetBaud	(	_Inout_ PCPPORT	Port,
		ULONG	Rate )

{
    if (CHECK_FLAG(Port->Flags, PORT_DEFAULT_RATE))
    {
        return FALSE;
    }
 
    //
    // N.B. The CLOCK_RATE defined in this file is different from the one
    // used by Uart16550SetBaud.
    //
 
    return Uart16550SetBaudCommon(Port, Rate, CLOCK_RATE);
}

Uart16550GetByte()

UART_STATUS Uart16550GetByte	(	_Inout_ PCPPORT	Port,
		_Out_ PUCHAR	Byte )

{
    UCHAR Data;
    UCHAR Lsr;
    UCHAR Msr;
 
    *Byte = 0;
 
    if ((Port == NULL) || (Port->Address == NULL))
    {
        return UartNotReady;
    }
 
    //
    // Check to see if all bits are set in LSR. If this is the case, it means
    // the port I/O address is invalid as 0xFF is nonsense for LSR.
    //
 
    Lsr = Port->Read(Port, COM_LSR);
    if (Lsr == SERIAL_LSR_NOT_PRESENT)
    {
        return UartNotReady;
    }
 
    if (CHECK_FLAG(Lsr, COM_DATRDY))
    {
        //
        // Return unsuccessfully if any errors are indicated by the
        // LSR.
        //
 
        if (CHECK_FLAG(Lsr, COM_PE) ||
            CHECK_FLAG(Lsr, COM_FE) ||
            CHECK_FLAG(Lsr, COM_OE))
        {
            return UartError;
        }
 
        Data = Port->Read(Port, COM_DAT);
 
        //
        // When using modem control, ignore any bytes that don't have
        // the carrier detect flag set.
        //
 
        if (CHECK_FLAG(Port->Flags, PORT_MODEM_CONTROL))
        {
            Msr = Port->Read(Port, COM_MSR);
            if (CHECK_FLAG(Msr, MS_CD) == FALSE)
            {
                return UartNoData;
            }
        }
 
        *Byte = Data;
        return UartSuccess;
    }
    else
    {
        //
        // Data is not available. Determine if the ring indicator has toggled.
        // If so, enable modem control.
        //
 
        Msr = Port->Read(Port, COM_MSR);
        if ((CHECK_FLAG(Port->Flags, PORT_RING_INDICATOR) &&
             !CHECK_FLAG(Msr, SERIAL_MSR_RI)) ||
            (!CHECK_FLAG(Port->Flags, PORT_RING_INDICATOR) &&
             CHECK_FLAG(Msr, SERIAL_MSR_RI)))
        {
            Port->Flags |= PORT_MODEM_CONTROL;
        }
 
        return UartNoData;
    }
}

Uart16550InitializePortCommon()

BOOLEAN Uart16550InitializePortCommon	(	_In_opt_ _Null_terminated_ PCHAR	LoadOptions,
		_Inout_ PCPPORT	Port,
		BOOLEAN	MemoryMapped,
		UCHAR	AccessSize,
		UCHAR	BitWidth )

{
    UCHAR RegisterValue;
 
    UNREFERENCED_PARAMETER(LoadOptions);
 
    //
    // Set the Read / Write function pointers for this serial port.
    //
 
    UartpSetAccess(Port, MemoryMapped, AccessSize, BitWidth);
 
    //
    // Set DLAB to zero. The DLAB controls the meaning of the first two
    // registers. When zero, the first register is used for all byte transfers
    // and the second register controls device interrupts.
    //
 
    RegisterValue = Port->Read(Port, COM_LCR);
    RegisterValue &= ~LC_DLAB;
    Port->Write(Port, COM_LCR, RegisterValue);
 
    //
    // Disable device interrupts.  This implementation will handle state
    // transitions by request only.
    //
 
    Port->Write(Port, COM_IEN, 0);
 
    //
    // Reset and disable the FIFO queue.
    // N.B. FIFO will be re-enabled before returning from this routine.
    //
 
    Port->Write(Port, COM_FCR, FC_CLEAR_TRANSMIT | FC_CLEAR_RECEIVE);
 
    //
    // Configure the baud rate and mode.
    //
 
    Uart16550SetBaud(Port, Port->BaudRate);
 
    //
    // Enable the FIFO.
    //
 
    Port->Write(Port, COM_FCR, FC_ENABLE);
 
    //
    // Assert DTR, RTS. Disable loopback. Indicate to the device that
    // we are able to send and receive data.
    //
 
    Port->Write(Port, COM_MCR, MC_DTRRTS);
 
    //
    // Initialize ring indicator bit based on hardware state.
    //
 
    RegisterValue = Port->Read(Port, COM_MSR);
    if (CHECK_FLAG(RegisterValue, SERIAL_MSR_RI))
    {
        Port->Flags |= PORT_RING_INDICATOR;
    }
 
    return TRUE;
}

Uart16550PutByte()

UART_STATUS Uart16550PutByte	(	_Inout_ PCPPORT	Port,
		UCHAR	Byte,
		BOOLEAN	BusyWait )

{
    UCHAR Lsr;
    UCHAR Msr;
 
    if ((Port == NULL) || (Port->Address == NULL))
    {
        return UartNotReady;
    }
 
    //
    // When using modem control, DSR, CTS, and CD flags must all be set before
    // sending any data.
    //
 
    if (CHECK_FLAG(Port->Flags, PORT_MODEM_CONTROL))
    {
        Msr = Port->Read(Port, COM_MSR);
        while ((Msr & MS_DSRCTSCD) != MS_DSRCTSCD)
        {
            //
            // If there's a byte ready, discard it from the input queue.
            //
 
            if (!CHECK_FLAG(Msr, MS_CD))
            {
                Lsr = Port->Read(Port, COM_LSR);
                if (CHECK_FLAG(Port->Flags, COM_DATRDY))
                {
                    Port->Read(Port, COM_DAT);
                }
            }
 
            Msr = Port->Read(Port, COM_MSR);
        }
    }
 
    //
    // Check to see if all bits are set in LSR. If this is the case, it means
    // the port I/O address is invalid as 0xFF is nonsense for LSR. This
    // prevents writing a byte to non-existent hardware.
    //
 
    Lsr = Port->Read(Port, COM_LSR);
    if (Lsr == SERIAL_LSR_NOT_PRESENT)
    {
        return UartNotReady;
    }
 
    //
    // The port must be ready to accept a byte for output before continuing.
    //
 
    while (!CHECK_FLAG(Lsr, COM_OUTRDY))
    {
        //
        // Determine if the ring indicator has toggled.
        // If so, enable modem control.
        //
 
        Msr = Port->Read(Port, COM_MSR);
        if ((CHECK_FLAG(Port->Flags, PORT_RING_INDICATOR) &&
             !CHECK_FLAG(Msr, SERIAL_MSR_RI)) ||
            (!CHECK_FLAG(Port->Flags, PORT_RING_INDICATOR) &&
             CHECK_FLAG(Msr, SERIAL_MSR_RI)))
        {
            Port->Flags |= PORT_MODEM_CONTROL;
        }
 
        if (BusyWait == FALSE)
        {
            return UartNotReady;
        }
 
        Lsr = Port->Read(Port, COM_LSR);
    }
 
    //
    // Transmitter holding register is empty. Send the byte.
    //
 
    Port->Write(Port, COM_DAT, Byte);
    return UartSuccess;
}

Uart16550RxReady()

BOOLEAN Uart16550RxReady

(

_Inout_ PCPPORT

Port

)

{
    UCHAR Lsr;
 
    if ((Port == NULL) || (Port->Address == NULL))
    {
        return FALSE;
    }
 
    //
    // Check to see if all bits are set in LSR. If this is the case, it means
    // the port I/O address is invalid as 0xFF is nonsense for LSR. This
    // prevents the DATRDY check below from returning TRUE, which could cause
    // a caller to think that data is pending when in actuality there is no
    // UART present.
    //
 
    Lsr = Port->Read(Port, COM_LSR);
    if (Lsr == SERIAL_LSR_NOT_PRESENT)
    {
        return FALSE;
    }
 
    //
    // Look at the Line Status Register to determine if there is pending data.
    //
 
    if (CHECK_FLAG(Lsr, COM_DATRDY))
    {
        return TRUE;
    }
 
    return FALSE;
}

Uart16550SetBaudCommon()

BOOLEAN Uart16550SetBaudCommon	(	_Inout_ PCPPORT	Port,
		ULONG	Rate,
		ULONG	Clock )

{
    UCHAR Lcr;
 
    if ((Port == NULL) || (Port->Address == NULL))
    {
        return FALSE;
    }
 
    if ((Rate == 0) || (Clock == 0))
    {
        return FALSE;
    }
 
    //
    // A device's baud rate is written to DLL and DLM.  The values of these
    // registers are the resultant when the max rate (clock) is divided by the
    // device's desired operating rate.
    //
 
    const ULONG DivisorLatch = Clock / Rate;
 
    //
    // Set the divisor latch access bit (DLAB) in the line control register.
    // When non-zero, the first two registers become DLL and DLM.
    //
 
    Lcr = Port->Read(Port, COM_LCR);
    Lcr |= LC_DLAB;
    Port->Write(Port, COM_LCR, Lcr);
 
    //
    // Set the divisor latch value (MSB first, then LSB).
    //
 
    Port->Write(Port, COM_DLM, (UCHAR)((DivisorLatch >> 8) & 0xFF));
    Port->Write(Port, COM_DLL, (UCHAR)(DivisorLatch & 0xFF));
 
    //
    // Set Line Control Register to 8N1 (no parity, 8 data bits, 1 stop bit).
    // This also sets the DLAB back to zero.
    //
 
    Port->Write(Port, COM_LCR, 3);
 
    //
    // Remember the baud rate.
    //
 
    Port->BaudRate = Rate;
    return TRUE;
}

Variable Documentation

Apm88xxxxHardwareDriver

UART_HARDWARE_DRIVER Apm88xxxxHardwareDriver

Initial value:

= {
    Apm88xxxxInitializePort,
    Apm88xxxxSetBaud,
    Uart16550GetByte,
    Uart16550PutByte,
    Uart16550RxReady}

                                               {
    Apm88xxxxInitializePort,
    Apm88xxxxSetBaud,
    Uart16550GetByte,
    Uart16550PutByte,
    Uart16550RxReady};