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mx6uart.c File Reference
#include "common.h"
#include <pshpack1.h>
#include <poppack.h>

Classes

struct  _MX6_UART_REGISTERS
 

Macros

#define MX6_UCR1_UARTEN   (1 << 0)
 
#define MX6_UCR2_TXEN   (1 << 2)
 
#define MX6_UCR2_RXEN   (1 << 1)
 
#define MX6_UCR2_PREN   (1 << 8)
 
#define MX6_UCR2_STPB   (1 << 6)
 
#define MX6_UCR2_WRDSZ   (1 << 5)
 
#define MX6_USR1_TRDY   (1 << 13)
 
#define MX6_USR2_RDR   (1 << 0)
 
#define MX6_RXD_CHARRDY   (1 << 15)
 
#define MX6_RXD_ERR   (1 << 14)
 
#define MX6_RXD_FRMERR   (1 << 12)
 
#define MX6_RXD_PARERR   (1 << 10)
 
#define MX6_RXD_DATA_MASK   0xFF
 
#define MX6_UFCR_TXTL_SHIFT   10
 
#define MX6_UFCR_TXTL_MAX   32
 
#define MX6_UFCR_TXTL_MASK   0x3F
 
#define MX6_USR1_PRTERRY_MASK   (1 << 15)
 
#define MX6_USR1_ESCF_MASK   (1 << 11)
 
#define MX6_USR1_FRMER_MASK   (1 << 10)
 
#define MX6_USR1_AGTIM_MASK   (1 << 8)
 
#define MX6_USR1_DTRD_MASK   (1 << 7)
 
#define MX6_USR1_AIRINT_MASK   (1 << 5)
 
#define MX6_USR1_AWAKE_MASK   (1 << 4)
 
#define MX6_USR2_RDRDY_MASK   1
 
#define MX6_UTS_RXEMPTY_MASK   (1 << 5)
 

Typedefs

typedef struct _MX6_UART_REGISTERS MX6_UART_REGISTERS
 
typedef struct _MX6_UART_REGISTERSPMX6_UART_REGISTERS
 

Functions

 C_ASSERT (FIELD_OFFSET(MX6_UART_REGISTERS, Umcr)==0xB8)
 
BOOLEAN MX6InitializePort (_In_opt_ _Null_terminated_ PCHAR LoadOptions, _Inout_ PCPPORT Port, BOOLEAN MemoryMapped, UCHAR AccessSize, UCHAR BitWidth)
 
BOOLEAN MX6SetBaud (_Inout_ PCPPORT Port, ULONG Rate)
 
UART_STATUS MX6GetByte (_Inout_ PCPPORT Port, _Out_ PUCHAR Byte)
 
UART_STATUS MX6PutByte (_Inout_ PCPPORT Port, UCHAR Byte, BOOLEAN BusyWait)
 
BOOLEAN MX6RxReady (_Inout_ PCPPORT Port)
 

Variables

UART_HARDWARE_DRIVER MX6HardwareDriver
 

Macro Definition Documentation

◆ MX6_RXD_CHARRDY

#define MX6_RXD_CHARRDY   (1 << 15)

◆ MX6_RXD_DATA_MASK

#define MX6_RXD_DATA_MASK   0xFF

◆ MX6_RXD_ERR

#define MX6_RXD_ERR   (1 << 14)

◆ MX6_RXD_FRMERR

#define MX6_RXD_FRMERR   (1 << 12)

◆ MX6_RXD_PARERR

#define MX6_RXD_PARERR   (1 << 10)

◆ MX6_UCR1_UARTEN

#define MX6_UCR1_UARTEN   (1 << 0)

◆ MX6_UCR2_PREN

#define MX6_UCR2_PREN   (1 << 8)

◆ MX6_UCR2_RXEN

#define MX6_UCR2_RXEN   (1 << 1)

◆ MX6_UCR2_STPB

#define MX6_UCR2_STPB   (1 << 6)

◆ MX6_UCR2_TXEN

#define MX6_UCR2_TXEN   (1 << 2)

◆ MX6_UCR2_WRDSZ

#define MX6_UCR2_WRDSZ   (1 << 5)

◆ MX6_UFCR_TXTL_MASK

#define MX6_UFCR_TXTL_MASK   0x3F

◆ MX6_UFCR_TXTL_MAX

#define MX6_UFCR_TXTL_MAX   32

◆ MX6_UFCR_TXTL_SHIFT

#define MX6_UFCR_TXTL_SHIFT   10

◆ MX6_USR1_AGTIM_MASK

#define MX6_USR1_AGTIM_MASK   (1 << 8)

◆ MX6_USR1_AIRINT_MASK

#define MX6_USR1_AIRINT_MASK   (1 << 5)

◆ MX6_USR1_AWAKE_MASK

#define MX6_USR1_AWAKE_MASK   (1 << 4)

◆ MX6_USR1_DTRD_MASK

#define MX6_USR1_DTRD_MASK   (1 << 7)

◆ MX6_USR1_ESCF_MASK

#define MX6_USR1_ESCF_MASK   (1 << 11)

◆ MX6_USR1_FRMER_MASK

#define MX6_USR1_FRMER_MASK   (1 << 10)

◆ MX6_USR1_PRTERRY_MASK

#define MX6_USR1_PRTERRY_MASK   (1 << 15)

◆ MX6_USR1_TRDY

#define MX6_USR1_TRDY   (1 << 13)

◆ MX6_USR2_RDR

#define MX6_USR2_RDR   (1 << 0)

◆ MX6_USR2_RDRDY_MASK

#define MX6_USR2_RDRDY_MASK   1

◆ MX6_UTS_RXEMPTY_MASK

#define MX6_UTS_RXEMPTY_MASK   (1 << 5)

Typedef Documentation

◆ MX6_UART_REGISTERS

◆ PMX6_UART_REGISTERS

Function Documentation

◆ C_ASSERT()

C_ASSERT ( FIELD_OFFSET(MX6_UART_REGISTERS, Umcr) = =0xB8)

◆ MX6GetByte()

UART_STATUS MX6GetByte ( _Inout_ PCPPORT Port,
_Out_ PUCHAR Byte )
232{
233 volatile PMX6_UART_REGISTERS Registers;
234 ULONG RxdReg;
235
236 if ((Port == NULL) || (Port->Address == NULL))
237 {
238 return UartNotReady;
239 }
240
241 Registers = (PMX6_UART_REGISTERS)Port->Address;
242
243 //
244 // Read an entry from the RX FIFO.
245 //
246
247 RxdReg = READ_REGISTER_ULONG(&Registers->Rxd);
248
249 //
250 // Check if the entry is valid (i.e. was a byte actually received).
251 //
252
253 if ((RxdReg & MX6_RXD_CHARRDY) == 0)
254 {
255 return UartNoData;
256 }
257
258 //
259 // Check if an error occurred.
260 //
261
262 if ((RxdReg & MX6_RXD_ERR) != 0)
263 {
264 return UartError;
265 }
266
267 //
268 // Mask off the data and return it
269 //
270
271 *Byte = (UCHAR)(RxdReg & MX6_RXD_DATA_MASK);
272 return UartSuccess;
273}
unsigned char UCHAR
Definition BasicTypes.h:35
unsigned long ULONG
Definition BasicTypes.h:37
#define MX6_RXD_ERR
Definition mx6uart.c:30
#define MX6_RXD_DATA_MASK
Definition mx6uart.c:33
struct _MX6_UART_REGISTERS * PMX6_UART_REGISTERS
#define MX6_RXD_CHARRDY
Definition mx6uart.c:29
Definition mx6uart.c:55
ULONG Rxd
Definition mx6uart.c:56
#define READ_REGISTER_ULONG
Definition uartp.h:41

◆ MX6InitializePort()

BOOLEAN MX6InitializePort ( _In_opt_ _Null_terminated_ PCHAR LoadOptions,
_Inout_ PCPPORT Port,
BOOLEAN MemoryMapped,
UCHAR AccessSize,
UCHAR BitWidth )
119{
120 volatile PMX6_UART_REGISTERS Registers;
121 ULONG Ucr1Reg;
122 ULONG Ucr2Reg;
123 ULONG UfcrReg;
124
125 UNREFERENCED_PARAMETER(LoadOptions);
126 UNREFERENCED_PARAMETER(AccessSize);
127 UNREFERENCED_PARAMETER(BitWidth);
128
129 if (MemoryMapped == FALSE)
130 {
131 return FALSE;
132 }
133
134 Registers = (PMX6_UART_REGISTERS)Port->Address;
135
136 //
137 // Verify UART is enabled. UEFI should have enabled the UART.
138 //
139
140 Ucr1Reg = READ_REGISTER_ULONG(&Registers->Ucr1);
141 if ((Ucr1Reg & MX6_UCR1_UARTEN) == 0)
142 {
143 return FALSE;
144 }
145
146 //
147 // Verify transmitter and receiver are enabled. These must be enabled
148 // or else writing to the RXD and TXD registers will cause a bus error.
149 //
150
151 Ucr2Reg = READ_REGISTER_ULONG(&Registers->Ucr2);
152 if (((Ucr2Reg & MX6_UCR2_TXEN) == 0) ||
153 ((Ucr2Reg & MX6_UCR2_RXEN) == 0))
154 {
155 return FALSE;
156 }
157
158 //
159 // Configure transmitter trigger level to maximum.
160 //
161
162 UfcrReg = READ_REGISTER_ULONG(&Registers->Ufcr);
163 UfcrReg = (UfcrReg & ~MX6_UFCR_TXTL_MASK) |
165
166 WRITE_REGISTER_ULONG(&Registers->Ufcr, UfcrReg);
167 return TRUE;
168}
#define TRUE
Definition BasicTypes.h:55
#define FALSE
Definition BasicTypes.h:54
#define MX6_UCR1_UARTEN
Definition mx6uart.c:21
#define MX6_UCR2_RXEN
Definition mx6uart.c:23
#define MX6_UFCR_TXTL_MAX
Definition mx6uart.c:36
#define MX6_UCR2_TXEN
Definition mx6uart.c:22
#define MX6_UFCR_TXTL_SHIFT
Definition mx6uart.c:35
ULONG Ucr1
Definition mx6uart.c:60
ULONG Ufcr
Definition mx6uart.c:64
ULONG Ucr2
Definition mx6uart.c:61
#define WRITE_REGISTER_ULONG
Definition uartp.h:42

◆ MX6PutByte()

UART_STATUS MX6PutByte ( _Inout_ PCPPORT Port,
UCHAR Byte,
BOOLEAN BusyWait )
302{
303 volatile PMX6_UART_REGISTERS Registers;
304 ULONG Usr1Reg;
305
306 if ((Port == NULL) || (Port->Address == NULL))
307 {
308 return UartNotReady;
309 }
310
311 Registers = (PMX6_UART_REGISTERS)Port->Address;
312
313 //
314 // Wait for the transmit interface to be ready (TRDY bit HIGH).
315 //
316
317 if (BusyWait != FALSE)
318 {
319 do
320 {
321 Usr1Reg = READ_REGISTER_ULONG(&Registers->Usr1);
322 } while ((Usr1Reg & MX6_USR1_TRDY) == 0);
323 }
324 else
325 {
326 Usr1Reg = READ_REGISTER_ULONG(&Registers->Usr1);
327 if ((Usr1Reg & MX6_USR1_TRDY) == 0)
328 {
329 return UartNotReady;
330 }
331 }
332
333 //
334 // Send the byte.
335 //
336
337 WRITE_REGISTER_ULONG(&Registers->Txd, Byte);
338 return UartSuccess;
339}
#define MX6_USR1_TRDY
Definition mx6uart.c:27
ULONG Txd
Definition mx6uart.c:58
ULONG Usr1
Definition mx6uart.c:65

◆ MX6RxReady()

BOOLEAN MX6RxReady ( _Inout_ PCPPORT Port)
361{
362 volatile PMX6_UART_REGISTERS Registers;
363 ULONG Usr2Reg;
364
365 if ((Port == NULL) || (Port->Address == NULL))
366 {
367 return FALSE;
368 }
369
370 Registers = (PMX6_UART_REGISTERS)Port->Address;
371
372 //
373 // Return TRUE if the "Receive Data Ready" bit is set
374 //
375
376 Usr2Reg = READ_REGISTER_ULONG(&Registers->Usr2);
377 return (Usr2Reg & MX6_USR2_RDR) != 0;
378}
#define MX6_USR2_RDR
Definition mx6uart.c:28
ULONG Usr2
Definition mx6uart.c:66

◆ MX6SetBaud()

BOOLEAN MX6SetBaud ( _Inout_ PCPPORT Port,
ULONG Rate )
195{
196 if ((Port == NULL) || (Port->Address == NULL))
197 {
198 return FALSE;
199 }
200
201 //
202 // Remember the baud rate.
203 //
204
205 Port->BaudRate = Rate;
206 return FALSE;
207}

Variable Documentation

◆ MX6HardwareDriver

UART_HARDWARE_DRIVER MX6HardwareDriver
Initial value:
= {
BOOLEAN MX6RxReady(_Inout_ PCPPORT Port)
Definition mx6uart.c:342
BOOLEAN MX6SetBaud(_Inout_ PCPPORT Port, ULONG Rate)
Definition mx6uart.c:171
BOOLEAN MX6InitializePort(_In_opt_ _Null_terminated_ PCHAR LoadOptions, _Inout_ PCPPORT Port, BOOLEAN MemoryMapped, UCHAR AccessSize, UCHAR BitWidth)
Definition mx6uart.c:84
UART_STATUS MX6PutByte(_Inout_ PCPPORT Port, UCHAR Byte, BOOLEAN BusyWait)
Definition mx6uart.c:276
UART_STATUS MX6GetByte(_Inout_ PCPPORT Port, _Out_ PUCHAR Byte)
Definition mx6uart.c:210
382 {
387 MX6RxReady};