48{
55
56 const CHAR * PciHeaderTypes[] = {
"Endpoint",
"PCI-to-PCI Bridge",
"PCI-to-CardBus Bridge"};
57
58 if (CommandTokens.size() < 4 || CommandTokens.size() > 5)
59 {
60 ShowMessages("Incorrect use of '%s'\n\n",
63 return;
64 }
65
67 {
69 {
70 ShowMessages("Invalid bus number '%s'\n\n",
73 return;
74 }
76 }
77
79 {
81 {
82 ShowMessages("Invalid device number '%s'\n\n",
85 return;
86 }
88 }
89
91 {
93 {
94 ShowMessages("Invalid function number '%s'\n\n",
97 return;
98 }
100 }
101
102 if (CommandTokens.size() == 5)
103 {
105 {
107 }
108 else
109 {
110 ShowMessages("Invalid parameter '%s'\n\n",
113 return;
114 }
115 }
116
117
118
119
121 {
123 }
124 else
125 {
127
128
129
130
131 Status = DeviceIoControl(
134 &PcidevinfoPacket,
136 &PcidevinfoPacket,
138
139 &ReturnedLength,
140 NULL
141 );
142
143 if (!Status)
144 {
145 ShowMessages("ioctl failed with code 0x%x\n", GetLastError());
146 return;
147 }
148
150 {
151
152
153
154 const CHAR * PciHeaderTypeAsString[] = {
"Endpoint",
"PCI-to-PCI Bridge",
"PCI-to-CardBus Bridge"};
155 const CHAR * PciMmioBarTypeAsString[] = {
"32-bit Wide",
156 "Reserved",
157 "64-bit Wide",
158 "Reserved"};
159 UINT8 BarNumOffset = 0;
160
161 ShowMessages("PCI configuration space (CAM) for device %04x:%02x:%02x:%x\n",
162 0,
166
168 {
170 CHAR * CurrentVendorName = (
CHAR *)
"N/A";
171 CHAR * CurrentDeviceName = (
CHAR *)
"N/A";
172
173 if (CurrentVendor != NULL)
174 {
175 CurrentVendorName = CurrentVendor->
VendorName;
177
178 if (CurrentDevice != NULL)
179 {
180 CurrentDeviceName = CurrentDevice->
DeviceName;
181 }
182 }
183
184 ShowMessages("\nCommon Header:\nVID:DID: %04x:%04x\nVendor Name: %-17.*s\nDevice Name: %.*s\nCommand: %04x\n",
188 CurrentVendorName,
190 CurrentDeviceName,
192
194 {
195 ShowMessages(" Memory Space: %u\n I/O Space: %u\n",
198 }
199
200 ShowMessages("Status: %04x\nRevision ID: %02x\nClass Code: %06x\nCacheLineSize: %02x\nPrimaryLatencyTimer: %02x\nHeaderType: %s (%02x)\n Multi-function Device: %s\nBist: %02x\n",
212
213 ShowMessages("\nDevice Header:\n");
214
216 {
217 for (
UINT8 i = 0; i < 5; i++)
218 {
219
220
221
223 {
224
225
226
228 {
231 UINT64 ActualBar = ((BarMsb & 0xFFFFFFFF) << 32) + (BarLsb & 0xFFFFFFF0);
232
233 ShowMessages("BAR%u %s\n BAR Type: MMIO\n MMIO BAR Type: %s (%02x)\n BAR MSB: %08x\n BAR LSB: %08x\n BAR (actual): %016llx\n Prefetchable: %s\n",
234 i - BarNumOffset,
238 BarMsb,
239 BarLsb,
240 ActualBar,
242
243 i++;
244 BarNumOffset++;
245 }
246
247
248
249 else
250 {
252
253 ShowMessages("BAR%u %s\n BAR Type: MMIO\n BAR: %08x\n BAR (actual): %08x\n Prefetchable: %s\n",
254 i - BarNumOffset,
257 ActualBar,
259 }
260 }
261
262
263
264 else
265 {
266
267
268
270
271 ShowMessages("BAR%u %s\n BAR Type: Port IO\n BAR: %08x\n BAR (actual): %08x\n Reserved: %u\n",
272 i - BarNumOffset,
275 ActualBar32,
277 }
278 }
279
280 ShowMessages("Cardbus CIS Pointer: %08x\nSubsystem Vendor ID: %04x\nSubsystem ID: %04x\nROM BAR: %08x\nCapabilities Pointer: %02x\nReserved (0xD): %06x\nReserved (0xE): %08x\nInterrupt Line: %02x\nInterrupt Pin: %02x\nMin Grant: %02x\nMax latency: %02x\n",
292 }
294 {
296
297 ShowMessages("Primary Bus Number: %02x\nSecondary Bus Number: %02x\nSubordinate Bus Number: %02x\nSecondary Latency Timer: %02x\nI/O Base: %02x\nI/O Limit: %02x\nSecondary Status: %04x\nMemory Base: %04x\nMemory Limit: %04x\nPrefetchable Memory Base: %04x\nPrefetchable Memory Limit: %04x\nPrefetchable Base Upper 32 Bits: %08x\nPrefetchable Limit Upper 32 Bits: %08x\nI/O Base Upper 16 Bits: %04x\nI/O Limit Upper 16 Bits: %04x\nCapability Pointer: %02x\nReserved: %06x\nROM BAR: %08x\nInterrupt Line: %02x\nInterrupt Pin: %02x\nBridge Control: %04x\n",
319 }
321 {
323 }
324 else
325 {
327 }
328 }
329 else
330 {
332
333 ShowMessages(" 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
334
336 {
337 ShowMessages("%02x: ", i);
338 for (
UINT8 j = 0; j < 16; j++)
339 {
340 ShowMessages(
"%02x ", *(((
BYTE *)cs) + j));
341 }
342
343
344
345
346
347 for (
UINT8 j = 0; j < 16; j++)
348 {
350 if (c >= 32 && c <= 126)
351 {
352 ShowMessages("%c", c);
353 }
354 else
355 {
356 ShowMessages(".");
357 }
358 }
359 ShowMessages("\n");
360 cs += 4;
361 }
362 }
363 }
364 else
365 {
366
367
368
369 ShowMessages("An error occurred, no results:");
370
372 }
373 }
374}
BOOLEAN g_IsSerialConnectedToRemoteDebuggee
Shows if the debugger was connected to remote debuggee over (A remote guest).
Definition globals.h:253
std::string GetCaseSensitiveStringFromCommandToken(CommandToken TargetToken)
Get case sensitive string from command token.
Definition common.cpp:467
BOOLEAN ConvertTokenToUInt32(CommandToken TargetToken, PUINT32 Result)
check and convert command token to a 32 bit unsigned integer
Definition common.cpp:546
BOOLEAN ShowErrorMessage(UINT32 Error)
shows the error message
Definition debugger.cpp:40
BOOLEAN KdSendPcidevinfoPacketToDebuggee(PDEBUGGEE_PCIDEVINFO_REQUEST_RESPONSE_PACKET PciepinfoPacket)
Request PCI device info (CAM). Current consumers include '!pcicam'.
Definition kd.cpp:3621
HANDLE g_DeviceHandle
Holds the global handle of device which is used to send the request to the kernel by IOCTL,...
Definition globals.h:481
BOOLEAN g_IsKdModuleLoaded
shows whether the kernel debugger (KD) module is loaded or not
Definition globals.h:22
Device * GetDeviceFromVendor(Vendor *VendorToUse, UINT16 DeviceId)
Returns Device entry corresponding to DeviceId.
Definition pci-id.cpp:339
Vendor * GetVendorById(UINT16 VendorId)
Returns Vendor entry, including corresponding devices and subdevices.
Definition pci-id.cpp:305
VOID FreePciIdDatabase()
Frees PciIdDatabaseBuffer.
Definition pci-id.cpp:288
VOID FreeVendor(Vendor *VendorToFree)
Frees Vendor and all of its members.
Definition pci-id.cpp:260
#define PCI_NAME_STR_LENGTH
Definition pci-id.h:15
VOID CommandPcicamHelp()
!pcicam command help
Definition pcicam.cpp:26
PCI_DEV DeviceInfo
Definition RequestStructures.h:1674
UINT32 KernelStatus
Definition RequestStructures.h:1672
BOOL PrintRaw
Definition RequestStructures.h:1673
BOOL IsEnabled
Definition Pcie.h:147
UINT8 Device
Definition Pcie.h:169
UINT8 Bus
Definition Pcie.h:168
UINT8 Function
Definition Pcie.h:170
PCI_DEV_MMIOBAR_INFO MmioBarInfo[6]
Definition Pcie.h:173
PORTABLE_PCI_CONFIG_SPACE_HEADER ConfigSpace
Definition Pcie.h:171
UINT8 Bist
Definition Pcie.h:60
UINT8 ClassCode[3]
Definition Pcie.h:56
UINT8 RevisionId
Definition Pcie.h:55
UINT16 Command
Definition Pcie.h:53
UINT8 CacheLineSize
Definition Pcie.h:57
UINT16 VendorId
Definition Pcie.h:51
UINT16 DeviceId
Definition Pcie.h:52
UINT8 HeaderType
Definition Pcie.h:59
UINT16 Status
Definition Pcie.h:54
UINT8 PrimaryLatencyTimer
Definition Pcie.h:58
PORTABLE_PCI_COMMON_HEADER CommonHeader
Definition Pcie.h:158
PORTABLE_PCI_DEVICE_HEADER DeviceHeader
Definition Pcie.h:159
UINT8 InterruptPin
Definition Pcie.h:107
UINT16 PrefetchableMemoryLimit
Definition Pcie.h:98
UINT8 IoLimit
Definition Pcie.h:93
UINT16 IoLimitUpper16b
Definition Pcie.h:102
UINT8 CapabilityPtr
Definition Pcie.h:103
UINT8 IoBase
Definition Pcie.h:92
UINT32 PrefetchableLimitUpper32b
Definition Pcie.h:100
UINT8 InterruptLine
Definition Pcie.h:106
UINT16 MemoryBase
Definition Pcie.h:95
UINT8 SecondaryLatencyTimer
Definition Pcie.h:91
UINT8 PrimaryBusNumber
Definition Pcie.h:88
UINT16 PrefetchableMemoryBase
Definition Pcie.h:97
UINT32 PrefetchableBaseUpper32b
Definition Pcie.h:99
UINT16 MemoryLimit
Definition Pcie.h:96
UINT32 Bar[2]
Definition Pcie.h:87
UINT16 SecondaryStatus
Definition Pcie.h:94
UINT8 SubordinateBusNumber
Definition Pcie.h:90
UINT8 Reserved[3]
Definition Pcie.h:104
UINT16 IoBaseUpper16b
Definition Pcie.h:101
UINT32 ROMBar
Definition Pcie.h:105
UINT8 SecondaryBusNumber
Definition Pcie.h:89
UINT16 BridgeControl
Definition Pcie.h:108
UINT8 MinGnt
Definition Pcie.h:81
UINT8 InterruptPin
Definition Pcie.h:80
UINT32 Bar[6]
Definition Pcie.h:71
UINT8 InterruptLine
Definition Pcie.h:79
UINT32 CardBusCISPtr
Definition Pcie.h:72
UINT8 CapabilitiesPtr
Definition Pcie.h:76
UINT16 SubSystemId
Definition Pcie.h:74
UINT32 Reserved1
Definition Pcie.h:78
UINT16 SubVendorId
Definition Pcie.h:73
UINT8 Reserved[3]
Definition Pcie.h:77
UINT8 MaxLat
Definition Pcie.h:82
UINT32 ROMBar
Definition Pcie.h:75
CHAR DeviceName[PCI_NAME_STR_LENGTH]
Definition pci-id.h:28
CHAR VendorName[PCI_NAME_STR_LENGTH]
Definition pci-id.h:36
struct _PORTABLE_PCI_DEVICE_HEADER::_PORTABLE_PCI_EP_HEADER ConfigSpaceEp
struct _PORTABLE_PCI_DEVICE_HEADER::_PORTABLE_PCI_BRIDGE_HEADER ConfigSpacePtpBridge