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spimax311.c File Reference
#include "common.h"

Classes

struct  _DW_APB_SSI_REGISTERS
 
struct  _SERIAL_PORT_MAX311XE
 

Macros

#define CRTLR0_SLV_OE   (1 << 10)
 
#define CTRLR0_TMOD_TX_RX   0
 
#define CTRLR0_TMOD_TX   (1 << 8)
 
#define CTRLR0_TMOD_RX   (2 << 8)
 
#define CTRLR0_TMOD_EEPROM   (3 << 8)
 
#define CTRLR0_SCPOL   (1 << 7)
 
#define CTRLR0_SCPH   (1 << 6)
 
#define CTRLR0_FRF_MOTOROLA_SPI   0
 
#define CTRLR0_FRF_TEXAS_INSTRUMENTS_SSP   (1 << 4)
 
#define CTRLR0_FRF_NATIONAL_SEMICONDUCTORS_MICROWIRE   (2 << 4)
 
#define CTRLR0_DFS   15
 
#define SSIENR_SSI_EN   1
 
#define BAUDR_MAX_RATE   2
 
#define BAUDR_OFF   0
 
#define SR_DCOL   (1 << 6)
 
#define SR_TXE   (1 << 5)
 
#define SR_RFF   (1 << 4)
 
#define SR_RFNE   (1 << 3)
 
#define SR_TFE   (1 << 2)
 
#define SR_TFNF   (1 << 1)
 
#define SR_BUSY   (1 << 0)
 
#define MAX311XE_WRITE_CONFIG   (3 << 14)
 
#define MAX311XE_READ_CONFIG   (1 << 14)
 
#define MAX311XE_WRITE_DATA   (2 << 14)
 
#define MAX311XE_READ_DATA   0
 
#define MAX311XE_WC_FEN_BAR   (1 << 13)
 
#define MAX311XE_WC_SHDNI   (1 << 12)
 
#define MAX311XE_WC_TM_BAR   (1 << 11)
 
#define MAX311XE_WC_RM_BAR   (1 << 10)
 
#define MAX311XE_WC_PM_BAR   (1 << 9)
 
#define MAX311XE_WC_RAM_BAR   (1 << 8)
 
#define MAX311XE_WC_IRDA   (1 << 7)
 
#define MAX311XE_WC_ST   (1 << 6)
 
#define MAX311XE_WC_PE   (1 << 5)
 
#define MAX311XE_WC_L   (1 << 4)
 
#define MAX311XE_WC_DIV_1   0
 
#define MAX311XE_WC_DIV_2   1
 
#define MAX311XE_WC_DIV_4   2
 
#define MAX311XE_WC_DIV_8   3
 
#define MAX311XE_WC_DIV_16   4
 
#define MAX311XE_WC_DIV_32   5
 
#define MAX311XE_WC_DIV_64   6
 
#define MAX311XE_WC_DIV_128   7
 
#define MAX311XE_WC_DIV_3   8
 
#define MAX311XE_WC_DIV_6   9
 
#define MAX311XE_WC_DIV_12   10
 
#define MAX311XE_WC_DIV_24   11
 
#define MAX311XE_WC_DIV_48   12
 
#define MAX311XE_WC_DIV_96   13
 
#define MAX311XE_WC_DIV_192   14
 
#define MAX311XE_WC_DIV_384   15
 
#define MAX311XE_RC_R   (1 << 15)
 
#define MAX311XE_RC_T   (1 << 14)
 
#define MAX311XE_RC_FEN_BAR   (1 << 13)
 
#define MAX311XE_RC_SHDNI   (1 << 12)
 
#define MAX311XE_RC_TM_BAR   (1 << 11)
 
#define MAX311XE_RC_RM_BAR   (1 << 10)
 
#define MAX311XE_RC_PM_BAR   (1 << 9)
 
#define MAX311XE_RC_RAM_BAR   (1 << 8)
 
#define MAX311XE_RC_IRDA   (1 << 7)
 
#define MAX311XE_RC_ST   (1 << 6)
 
#define MAX311XE_RC_PE   (1 << 5)
 
#define MAX311XE_RC_L   (1 << 4)
 
#define MAX311XE_RC_DIV_1   0
 
#define MAX311XE_RC_DIV_2   1
 
#define MAX311XE_RC_DIV_4   2
 
#define MAX311XE_RC_DIV_8   3
 
#define MAX311XE_RC_DIV_16   4
 
#define MAX311XE_RC_DIV_32   5
 
#define MAX311XE_RC_DIV_64   6
 
#define MAX311XE_RC_DIV_128   7
 
#define MAX311XE_RC_DIV_3   8
 
#define MAX311XE_RC_DIV_6   9
 
#define MAX311XE_RC_DIV_12   10
 
#define MAX311XE_RC_DIV_24   11
 
#define MAX311XE_RC_DIV_48   12
 
#define MAX311XE_RC_DIV_96   13
 
#define MAX311XE_RC_DIV_192   14
 
#define MAX311XE_RC_DIV_384   15
 
#define MAX311XE_WD_TE_BAR   (1 << 10)
 
#define MAX311XE_WD_RTS_BAR   (1 << 9)
 
#define MAX311XE_WD_PT   (1 << 8)
 
#define MAX311XE_WD_DATA   0xFF
 
#define MAX311XE_RD_R   (1 << 15)
 
#define MAX311XE_RD_T   (1 << 14)
 
#define MAX311XE_RD_RA_FE   (1 << 10)
 
#define MAX311XE_RD_CTS   (1 << 9)
 
#define MAX311XE_RD_PR   (1 << 8)
 
#define MAX311XE_RD_DATA   0xFF
 
#define SELECTOR_LED   1
 
#define SELECTOR_UART   2
 
#define SELECTOR_2MB_FLASH   4
 
#define RECEIVE_BUFFER_SIZE   1024
 

Typedefs

typedef struct _DW_APB_SSI_REGISTERS DW_APB_SSI_REGISTERS
 
typedef struct _DW_APB_SSI_REGISTERSPDW_APB_SSI_REGISTERS
 
typedef struct _SERIAL_PORT_MAX311XE SERIAL_PORT_MAX311XE
 
typedef struct _SERIAL_PORT_MAX311XEPSERIAL_PORT_MAX311XE
 

Functions

BOOLEAN SpiMax311SetBaud (_Inout_ PCPPORT Port, ULONG Rate)
 
VOID SpiInit (_Inout_ PDW_APB_SSI_REGISTERS Spi, UINT16 ControlRegister0, UINT16 ControlRegister1, UINT16 BaudRateRegister)
 
UINT16 SpiSend16 (_In_ PCPPORT Port, UINT16 Value)
 
VOID SpiMax311BufferRxData (UINT16 Value)
 
BOOLEAN SpiMax311TxEmpty (_In_ PCPPORT Port)
 
BOOLEAN SpiMax311InitializePort (_In_opt_ _Null_terminated_ PCHAR LoadOptions, _Inout_ PCPPORT Port, BOOLEAN MemoryMapped, UCHAR AccessSize, UCHAR BitWidth)
 
UART_STATUS SpiMax311GetByte (_Inout_ PCPPORT Port, _Out_ PUCHAR Byte)
 
UART_STATUS SpiMax311PutByte (_Inout_ PCPPORT Port, UCHAR Byte, BOOLEAN BusyWait)
 
BOOLEAN SpiMax311RxReady (_In_ PCPPORT Port)
 

Variables

UART_HARDWARE_DRIVER SpiMax311HardwareDriver
 

Macro Definition Documentation

◆ BAUDR_MAX_RATE

#define BAUDR_MAX_RATE   2

◆ BAUDR_OFF

#define BAUDR_OFF   0

◆ CRTLR0_SLV_OE

#define CRTLR0_SLV_OE   (1 << 10)

◆ CTRLR0_DFS

#define CTRLR0_DFS   15

◆ CTRLR0_FRF_MOTOROLA_SPI

#define CTRLR0_FRF_MOTOROLA_SPI   0

◆ CTRLR0_FRF_NATIONAL_SEMICONDUCTORS_MICROWIRE

#define CTRLR0_FRF_NATIONAL_SEMICONDUCTORS_MICROWIRE   (2 << 4)

◆ CTRLR0_FRF_TEXAS_INSTRUMENTS_SSP

#define CTRLR0_FRF_TEXAS_INSTRUMENTS_SSP   (1 << 4)

◆ CTRLR0_SCPH

#define CTRLR0_SCPH   (1 << 6)

◆ CTRLR0_SCPOL

#define CTRLR0_SCPOL   (1 << 7)

◆ CTRLR0_TMOD_EEPROM

#define CTRLR0_TMOD_EEPROM   (3 << 8)

◆ CTRLR0_TMOD_RX

#define CTRLR0_TMOD_RX   (2 << 8)

◆ CTRLR0_TMOD_TX

#define CTRLR0_TMOD_TX   (1 << 8)

◆ CTRLR0_TMOD_TX_RX

#define CTRLR0_TMOD_TX_RX   0

◆ MAX311XE_RC_DIV_1

#define MAX311XE_RC_DIV_1   0

◆ MAX311XE_RC_DIV_12

#define MAX311XE_RC_DIV_12   10

◆ MAX311XE_RC_DIV_128

#define MAX311XE_RC_DIV_128   7

◆ MAX311XE_RC_DIV_16

#define MAX311XE_RC_DIV_16   4

◆ MAX311XE_RC_DIV_192

#define MAX311XE_RC_DIV_192   14

◆ MAX311XE_RC_DIV_2

#define MAX311XE_RC_DIV_2   1

◆ MAX311XE_RC_DIV_24

#define MAX311XE_RC_DIV_24   11

◆ MAX311XE_RC_DIV_3

#define MAX311XE_RC_DIV_3   8

◆ MAX311XE_RC_DIV_32

#define MAX311XE_RC_DIV_32   5

◆ MAX311XE_RC_DIV_384

#define MAX311XE_RC_DIV_384   15

◆ MAX311XE_RC_DIV_4

#define MAX311XE_RC_DIV_4   2

◆ MAX311XE_RC_DIV_48

#define MAX311XE_RC_DIV_48   12

◆ MAX311XE_RC_DIV_6

#define MAX311XE_RC_DIV_6   9

◆ MAX311XE_RC_DIV_64

#define MAX311XE_RC_DIV_64   6

◆ MAX311XE_RC_DIV_8

#define MAX311XE_RC_DIV_8   3

◆ MAX311XE_RC_DIV_96

#define MAX311XE_RC_DIV_96   13

◆ MAX311XE_RC_FEN_BAR

#define MAX311XE_RC_FEN_BAR   (1 << 13)

◆ MAX311XE_RC_IRDA

#define MAX311XE_RC_IRDA   (1 << 7)

◆ MAX311XE_RC_L

#define MAX311XE_RC_L   (1 << 4)

◆ MAX311XE_RC_PE

#define MAX311XE_RC_PE   (1 << 5)

◆ MAX311XE_RC_PM_BAR

#define MAX311XE_RC_PM_BAR   (1 << 9)

◆ MAX311XE_RC_R

#define MAX311XE_RC_R   (1 << 15)

◆ MAX311XE_RC_RAM_BAR

#define MAX311XE_RC_RAM_BAR   (1 << 8)

◆ MAX311XE_RC_RM_BAR

#define MAX311XE_RC_RM_BAR   (1 << 10)

◆ MAX311XE_RC_SHDNI

#define MAX311XE_RC_SHDNI   (1 << 12)

◆ MAX311XE_RC_ST

#define MAX311XE_RC_ST   (1 << 6)

◆ MAX311XE_RC_T

#define MAX311XE_RC_T   (1 << 14)

◆ MAX311XE_RC_TM_BAR

#define MAX311XE_RC_TM_BAR   (1 << 11)

◆ MAX311XE_RD_CTS

#define MAX311XE_RD_CTS   (1 << 9)

◆ MAX311XE_RD_DATA

#define MAX311XE_RD_DATA   0xFF

◆ MAX311XE_RD_PR

#define MAX311XE_RD_PR   (1 << 8)

◆ MAX311XE_RD_R

#define MAX311XE_RD_R   (1 << 15)

◆ MAX311XE_RD_RA_FE

#define MAX311XE_RD_RA_FE   (1 << 10)

◆ MAX311XE_RD_T

#define MAX311XE_RD_T   (1 << 14)

◆ MAX311XE_READ_CONFIG

#define MAX311XE_READ_CONFIG   (1 << 14)

◆ MAX311XE_READ_DATA

#define MAX311XE_READ_DATA   0

◆ MAX311XE_WC_DIV_1

#define MAX311XE_WC_DIV_1   0

◆ MAX311XE_WC_DIV_12

#define MAX311XE_WC_DIV_12   10

◆ MAX311XE_WC_DIV_128

#define MAX311XE_WC_DIV_128   7

◆ MAX311XE_WC_DIV_16

#define MAX311XE_WC_DIV_16   4

◆ MAX311XE_WC_DIV_192

#define MAX311XE_WC_DIV_192   14

◆ MAX311XE_WC_DIV_2

#define MAX311XE_WC_DIV_2   1

◆ MAX311XE_WC_DIV_24

#define MAX311XE_WC_DIV_24   11

◆ MAX311XE_WC_DIV_3

#define MAX311XE_WC_DIV_3   8

◆ MAX311XE_WC_DIV_32

#define MAX311XE_WC_DIV_32   5

◆ MAX311XE_WC_DIV_384

#define MAX311XE_WC_DIV_384   15

◆ MAX311XE_WC_DIV_4

#define MAX311XE_WC_DIV_4   2

◆ MAX311XE_WC_DIV_48

#define MAX311XE_WC_DIV_48   12

◆ MAX311XE_WC_DIV_6

#define MAX311XE_WC_DIV_6   9

◆ MAX311XE_WC_DIV_64

#define MAX311XE_WC_DIV_64   6

◆ MAX311XE_WC_DIV_8

#define MAX311XE_WC_DIV_8   3

◆ MAX311XE_WC_DIV_96

#define MAX311XE_WC_DIV_96   13

◆ MAX311XE_WC_FEN_BAR

#define MAX311XE_WC_FEN_BAR   (1 << 13)

◆ MAX311XE_WC_IRDA

#define MAX311XE_WC_IRDA   (1 << 7)

◆ MAX311XE_WC_L

#define MAX311XE_WC_L   (1 << 4)

◆ MAX311XE_WC_PE

#define MAX311XE_WC_PE   (1 << 5)

◆ MAX311XE_WC_PM_BAR

#define MAX311XE_WC_PM_BAR   (1 << 9)

◆ MAX311XE_WC_RAM_BAR

#define MAX311XE_WC_RAM_BAR   (1 << 8)

◆ MAX311XE_WC_RM_BAR

#define MAX311XE_WC_RM_BAR   (1 << 10)

◆ MAX311XE_WC_SHDNI

#define MAX311XE_WC_SHDNI   (1 << 12)

◆ MAX311XE_WC_ST

#define MAX311XE_WC_ST   (1 << 6)

◆ MAX311XE_WC_TM_BAR

#define MAX311XE_WC_TM_BAR   (1 << 11)

◆ MAX311XE_WD_DATA

#define MAX311XE_WD_DATA   0xFF

◆ MAX311XE_WD_PT

#define MAX311XE_WD_PT   (1 << 8)

◆ MAX311XE_WD_RTS_BAR

#define MAX311XE_WD_RTS_BAR   (1 << 9)

◆ MAX311XE_WD_TE_BAR

#define MAX311XE_WD_TE_BAR   (1 << 10)

◆ MAX311XE_WRITE_CONFIG

#define MAX311XE_WRITE_CONFIG   (3 << 14)

◆ MAX311XE_WRITE_DATA

#define MAX311XE_WRITE_DATA   (2 << 14)

◆ RECEIVE_BUFFER_SIZE

#define RECEIVE_BUFFER_SIZE   1024

◆ SELECTOR_2MB_FLASH

#define SELECTOR_2MB_FLASH   4

◆ SELECTOR_LED

#define SELECTOR_LED   1

◆ SELECTOR_UART

#define SELECTOR_UART   2

◆ SR_BUSY

#define SR_BUSY   (1 << 0)

◆ SR_DCOL

#define SR_DCOL   (1 << 6)

◆ SR_RFF

#define SR_RFF   (1 << 4)

◆ SR_RFNE

#define SR_RFNE   (1 << 3)

◆ SR_TFE

#define SR_TFE   (1 << 2)

◆ SR_TFNF

#define SR_TFNF   (1 << 1)

◆ SR_TXE

#define SR_TXE   (1 << 5)

◆ SSIENR_SSI_EN

#define SSIENR_SSI_EN   1

Typedef Documentation

◆ DW_APB_SSI_REGISTERS

◆ PDW_APB_SSI_REGISTERS

◆ PSERIAL_PORT_MAX311XE

◆ SERIAL_PORT_MAX311XE

Function Documentation

◆ SpiInit()

VOID SpiInit ( _Inout_ PDW_APB_SSI_REGISTERS Spi,
UINT16 ControlRegister0,
UINT16 ControlRegister1,
UINT16 BaudRateRegister )
269{
270 UINT16 Isr;
271 UINT16 Risr;
272 ULONG SpiStatus;
273
274 //
275 // Wait until the SPI is idle.
276 //
277
278 do
279 {
280 SpiStatus = READ_REGISTER_ULONG(&(Spi->Sr));
281 SpiStatus &= SR_BUSY | SR_TFE;
282 } while (SpiStatus != SR_TFE);
283
284 //
285 // Remove any data not read during the previous transaction.
286 //
287
288 SpiStatus = READ_REGISTER_ULONG(&(Spi->Sr)) & SR_RFNE;
289 while (SpiStatus != 0)
290 {
291 //
292 // Discard the previous transaction's data.
293 //
294
295 READ_REGISTER_ULONG(&(Spi->Dr));
296 SpiStatus = READ_REGISTER_ULONG(&(Spi->Sr)) & SR_RFNE;
297 }
298
299 //
300 // Deselect the previous chip by writing 0 into the Slave Enable Register.
301 //
302
303 WRITE_REGISTER_ULONG(&(Spi->Ser), 0);
304
305 //
306 // Disable the SPI controller by writing 0 into the Enable register.
307 //
308
309 WRITE_REGISTER_ULONG(&(Spi->Ssienr), 0);
310
311 //
312 // Initialize the SPI controller. Control Register 0 receives the type and
313 // bits per single transfer. Control Register 1 receives the number of bytes
314 // to receive. Baudr receives the baud rate. Note that the controller must
315 // be disabled when programming these registers.
316 //
317
318 WRITE_REGISTER_ULONG(&(Spi->Ctrlr0), ControlRegister0);
319 WRITE_REGISTER_ULONG(&(Spi->Ctrlr1), ControlRegister1);
320 WRITE_REGISTER_ULONG(&(Spi->Baudr), BaudRateRegister);
321
322 //
323 // Clear any pending interrupts in the SPI controller.
324 //
325
326 do
327 {
328 Risr = (UINT16)READ_REGISTER_ULONG(&(Spi->Risr));
329 Isr = (UINT16)READ_REGISTER_ULONG(&(Spi->Isr));
330 } while ((Risr != 0) || (Isr != 0));
331
332 //
333 // Enable the SPI controller by writing 1 into the Enable Register.
334 //
335
336 WRITE_REGISTER_ULONG(&(Spi->Ssienr), 1);
337}
unsigned short UINT16
Definition BasicTypes.h:47
unsigned long ULONG
Definition BasicTypes.h:37
#define SR_BUSY
Definition spimax311.c:58
#define SR_RFNE
Definition spimax311.c:55
#define SR_TFE
Definition spimax311.c:56
#define WRITE_REGISTER_ULONG
Definition uartp.h:42
#define READ_REGISTER_ULONG
Definition uartp.h:41

◆ SpiMax311BufferRxData()

VOID SpiMax311BufferRxData ( UINT16 Value)
436{
437 ULONG NextHead;
438 PUINT16 RxBufferHead;
439
440 //
441 // A receive character is available. Buffer this character for a later
442 // receive operation.
443 //
444
445 RxBufferHead = Max311.RxBuffer + Max311.RxBufferFill;
446 NextHead = (Max311.RxBufferFill + 1) % RECEIVE_BUFFER_SIZE;
447 if (NextHead != Max311.RxBufferDrain)
448 {
449 *RxBufferHead = Value;
450 Max311.RxBufferFill = NextHead;
451 }
452}
unsigned short * PUINT16
Definition BasicTypes.h:47
RequestedActionOfThePacket Value(0x1) 00000000
#define RECEIVE_BUFFER_SIZE
Definition spimax311.c:174
ULONG RxBufferDrain
Definition spimax311.c:221
ULONG RxBufferFill
Definition spimax311.c:220
UINT16 RxBuffer[RECEIVE_BUFFER_SIZE]
Definition spimax311.c:223

◆ SpiMax311GetByte()

UART_STATUS SpiMax311GetByte ( _Inout_ PCPPORT Port,
_Out_ PUCHAR Byte )
726{
727 PUINT16 RxBufferTail;
729
730 if ((Port == NULL) || (Port->Address == NULL))
731 {
732 return UartNotReady;
733 }
734
735 //
736 // Empty the receive buffer first.
737 //
738
739 if (Max311.RxBufferDrain != Max311.RxBufferFill)
740 {
741 //
742 // Get the next value from the receive buffer, and move the buffer
743 // pointer.
744 //
745
746 RxBufferTail = Max311.RxBuffer + Max311.RxBufferDrain;
747 Value = *RxBufferTail;
748 *Byte = (UCHAR)Value;
749 Max311.RxBufferDrain = (Max311.RxBufferDrain + 1) % RECEIVE_BUFFER_SIZE;
750
751 //
752 // Return unsuccessfully if any errors are indicated.
753 //
754
756 {
757 return UartError;
758 }
759
760 return UartSuccess;
761 }
762
763 //
764 // The receive buffer is empty, so go to the physical device.
765 // Read the byte from the UART.
766 //
767
769 if (CHECK_FLAG(Value, MAX311XE_RD_R) != 0)
770 {
771 //
772 // Return unsuccessfully if any errors are indicated.
773 //
774
775 *Byte = (UCHAR)Value;
777 {
778 return UartError;
779 }
780
781 return UartSuccess;
782 }
783
784 return UartNoData;
785}
unsigned char UCHAR
Definition BasicTypes.h:35
#define FALSE
Definition BasicTypes.h:54
UINT16 SpiSend16(_In_ PCPPORT Port, UINT16 Value)
Definition spimax311.c:340
#define MAX311XE_RD_RA_FE
Definition spimax311.c:159
#define MAX311XE_READ_DATA
Definition spimax311.c:68
#define MAX311XE_RD_R
Definition spimax311.c:157
#define CHECK_FLAG(_x, _f)
Definition uartp.h:27

◆ SpiMax311InitializePort()

BOOLEAN SpiMax311InitializePort ( _In_opt_ _Null_terminated_ PCHAR LoadOptions,
_Inout_ PCPPORT Port,
BOOLEAN MemoryMapped,
UCHAR AccessSize,
UCHAR BitWidth )
555{
557
558 UNREFERENCED_PARAMETER(LoadOptions);
559 UNREFERENCED_PARAMETER(MemoryMapped);
560 UNREFERENCED_PARAMETER(AccessSize);
561 UNREFERENCED_PARAMETER(BitWidth);
562
563 Port->Flags = 0;
564
565 //
566 // Discard any previously buffered data.
567 //
568
569 Max311.RxBufferDrain = 0;
570 Max311.RxBufferFill = 0;
571
572 //
573 // Store the current SPI Baud Rate register value. It is assumed that the
574 // firmware set this up to work correctly with the debugging device.
575 //
576
577 Spi = (PDW_APB_SSI_REGISTERS)Port->Address;
578 Max311.SpiBaudRate = (UINT16)Spi->Baudr;
579
580 //
581 // Initialize the hardware.
582 //
583
584 SpiMax311SetBaud(Port, Port->BaudRate);
585 return TRUE;
586}
#define TRUE
Definition BasicTypes.h:55
struct _DW_APB_SSI_REGISTERS * PDW_APB_SSI_REGISTERS
BOOLEAN SpiMax311SetBaud(_Inout_ PCPPORT Port, ULONG Rate)
Definition spimax311.c:589
Definition spimax311.c:183
UINT16 SpiBaudRate
Definition spimax311.c:222

◆ SpiMax311PutByte()

UART_STATUS SpiMax311PutByte ( _Inout_ PCPPORT Port,
UCHAR Byte,
BOOLEAN BusyWait )
814{
816
817 if ((Port == NULL) || (Port->Address == NULL))
818 {
819 return UartNotReady;
820 }
821
822 //
823 // Wait for the port to be not busy.
824 //
825
826 if (BusyWait != FALSE)
827 {
828 while (!SpiMax311TxEmpty(Port))
829 ;
830 }
831 else if (!SpiMax311TxEmpty(Port))
832 {
833 return UartNotReady;
834 }
835
836 //
837 // The transmitter buffer is now clear, send the character.
838 //
839
840 Value = SpiSend16(Port, (UINT16)Byte | MAX311XE_WRITE_DATA);
841
842 //
843 // Buffer any receive data.
844 //
845
846 while (TRUE)
847 {
848 //
849 // Exit the loop if no receive data came through.
850 //
851
852 if (CHECK_FLAG(Value, MAX311XE_RD_R) == 0)
853 {
854 break;
855 }
856
857 //
858 // Buffer any receive data.
859 //
860
862
863 //
864 // Get the receive buffer status from the UART.
865 //
866
868 }
869
870 return UartSuccess;
871}
BOOLEAN SpiMax311TxEmpty(_In_ PCPPORT Port)
Definition spimax311.c:455
#define MAX311XE_WRITE_DATA
Definition spimax311.c:67
VOID SpiMax311BufferRxData(UINT16 Value)
Definition spimax311.c:417

◆ SpiMax311RxReady()

BOOLEAN SpiMax311RxReady ( _In_ PCPPORT Port)
893{
895
896 if ((Port == NULL) || (Port->Address == NULL))
897 {
898 return FALSE;
899 }
900
901 //
902 // Buffer any receive data.
903 //
904
905 while (TRUE)
906 {
907 //
908 // Get the receive buffer status from the UART.
909 //
910
912
913 //
914 // Exit the loop if no receive data came through.
915 //
916
917 if (CHECK_FLAG(Value, MAX311XE_RD_R) == 0)
918 {
919 break;
920 }
921
922 //
923 // Buffer any received data.
924 //
925
927 }
928
929 //
930 // Determine if there is a received character waiting in the buffer.
931 //
932
933 if (Max311.RxBufferFill != Max311.RxBufferDrain)
934 {
935 return TRUE;
936 }
937
938 return FALSE;
939}

◆ SpiMax311SetBaud()

BOOLEAN SpiMax311SetBaud ( _Inout_ PCPPORT Port,
ULONG Rate )
611{
612 UINT16 ConfigValue;
613
614 if ((Port == NULL) || (Port->Address == NULL))
615 {
616 return FALSE;
617 }
618
619 //
620 // Select the baud rate
621 //
622
623 switch (Rate)
624 {
625 case 230400:
626 ConfigValue = MAX311XE_WC_DIV_1;
627 break;
628
629 default:
630 __fallthrough;
631
632 case 115200:
633 ConfigValue = MAX311XE_WC_DIV_2;
634 break;
635
636 case 76800:
637 ConfigValue = MAX311XE_WC_DIV_3;
638 break;
639
640 case 57600:
641 ConfigValue = MAX311XE_WC_DIV_4;
642 break;
643
644 case 38400:
645 ConfigValue = MAX311XE_WC_DIV_6;
646 break;
647
648 case 28800:
649 ConfigValue = MAX311XE_WC_DIV_8;
650 break;
651
652 case 19200:
653 ConfigValue = MAX311XE_WC_DIV_12;
654 break;
655
656 case 14400:
657 ConfigValue = MAX311XE_WC_DIV_16;
658 break;
659
660 case 9600:
661 ConfigValue = MAX311XE_WC_DIV_24;
662 break;
663
664 case 7200:
665 ConfigValue = MAX311XE_WC_DIV_32;
666 break;
667
668 case 4800:
669 ConfigValue = MAX311XE_WC_DIV_48;
670 break;
671
672 case 3600:
673 ConfigValue = MAX311XE_WC_DIV_64;
674 break;
675
676 case 2400:
677 ConfigValue = MAX311XE_WC_DIV_96;
678 break;
679
680 case 1800:
681 ConfigValue = MAX311XE_WC_DIV_128;
682 break;
683
684 case 1200:
685 ConfigValue = MAX311XE_WC_DIV_192;
686 break;
687
688 case 600:
689 ConfigValue = MAX311XE_WC_DIV_384;
690 break;
691 }
692
693 //
694 // Configure the UART for 8 data bits, no parity, 1 stop bit (8N1).
695 //
696
697 ConfigValue |= MAX311XE_WRITE_CONFIG;
698 SpiSend16(Port, ConfigValue);
699 Port->BaudRate = Rate;
700 return TRUE;
701}
#define MAX311XE_WC_DIV_3
Definition spimax311.c:97
#define MAX311XE_WC_DIV_48
Definition spimax311.c:101
#define MAX311XE_WC_DIV_192
Definition spimax311.c:103
#define MAX311XE_WC_DIV_2
Definition spimax311.c:90
#define MAX311XE_WC_DIV_8
Definition spimax311.c:92
#define MAX311XE_WC_DIV_384
Definition spimax311.c:104
#define MAX311XE_WC_DIV_4
Definition spimax311.c:91
#define MAX311XE_WC_DIV_1
Definition spimax311.c:89
#define MAX311XE_WC_DIV_32
Definition spimax311.c:94
#define MAX311XE_WC_DIV_64
Definition spimax311.c:95
#define MAX311XE_WC_DIV_128
Definition spimax311.c:96
#define MAX311XE_WC_DIV_96
Definition spimax311.c:102
#define MAX311XE_WC_DIV_24
Definition spimax311.c:100
#define MAX311XE_WRITE_CONFIG
Definition spimax311.c:65
#define MAX311XE_WC_DIV_16
Definition spimax311.c:93
#define MAX311XE_WC_DIV_6
Definition spimax311.c:98
#define MAX311XE_WC_DIV_12
Definition spimax311.c:99

◆ SpiMax311TxEmpty()

BOOLEAN SpiMax311TxEmpty ( _In_ PCPPORT Port)
474{
476
477 //
478 // Buffer any receive data.
479 //
480
481 while (TRUE)
482 {
483 //
484 // Get the transmit buffer status from the UART.
485 //
486
488
489 //
490 // Exit the loop if no receive data.
491 //
492
493 if (CHECK_FLAG(Value, MAX311XE_RD_R) == 0)
494 {
495 break;
496 }
497
498 //
499 // Buffer any received data.
500 //
501
503 }
504
505 //
506 // Determine if there is space in the transmit buffer.
507 //
508
509 if (CHECK_FLAG(Value, MAX311XE_RD_T) != 0)
510 {
511 return TRUE;
512 }
513
514 return FALSE;
515}
#define MAX311XE_RD_T
Definition spimax311.c:158

◆ SpiSend16()

UINT16 SpiSend16 ( _In_ PCPPORT Port,
UINT16 Value )
363{
364 UINT32 Data;
366 ULONG SpiStatus;
367
368 //
369 // Locate the SPI controller.
370 //
371
372 Spi = (PDW_APB_SSI_REGISTERS)Port->Address;
373
374 //
375 // Initialize the SPI controller. The value for Control Register 0 indicates
376 // to both send and receive data, and to send 16 bits per transfer. The
377 // baud rate register is for the SPI controller, not the UART.
378 //
379
380 SpiInit(Spi,
381 CTRLR0_TMOD_TX_RX | (16 - 1),
382 0,
383 Max311.SpiBaudRate);
384
385 //
386 // Select the UART device on the SPI bus.
387 //
388
390
391 //
392 // Write the value to the UART.
393 //
394
395 WRITE_REGISTER_ULONG(&(Spi->Dr), Value);
396
397 //
398 // Wait until the SPI operation is complete.
399 //
400
401 do
402 {
403 SpiStatus = READ_REGISTER_ULONG(&(Spi->Sr));
404 SpiStatus &= SR_BUSY | SR_TFE | SR_RFNE;
405
406 } while (SpiStatus != (SR_TFE | SR_RFNE));
407
408 //
409 // Read the data value that came in as a result of the send.
410 //
411
412 Data = READ_REGISTER_ULONG(&(Spi->Dr));
413 return (UINT16)Data;
414}
unsigned int UINT32
Definition BasicTypes.h:48
Start of Optional Data
Definition script_buffer.hex.txt:8
#define SELECTOR_UART
Definition spimax311.c:171
#define CTRLR0_TMOD_TX_RX
Definition spimax311.c:27
VOID SpiInit(_Inout_ PDW_APB_SSI_REGISTERS Spi, UINT16 ControlRegister0, UINT16 ControlRegister1, UINT16 BaudRateRegister)
Definition spimax311.c:240

Variable Documentation

◆ SpiMax311HardwareDriver

UART_HARDWARE_DRIVER SpiMax311HardwareDriver
Initial value:
= {
BOOLEAN SpiMax311InitializePort(_In_opt_ _Null_terminated_ PCHAR LoadOptions, _Inout_ PCPPORT Port, BOOLEAN MemoryMapped, UCHAR AccessSize, UCHAR BitWidth)
Definition spimax311.c:520
UART_STATUS SpiMax311GetByte(_Inout_ PCPPORT Port, _Out_ PUCHAR Byte)
Definition spimax311.c:704
BOOLEAN SpiMax311RxReady(_In_ PCPPORT Port)
Definition spimax311.c:874
UART_STATUS SpiMax311PutByte(_Inout_ PCPPORT Port, UCHAR Byte, BOOLEAN BusyWait)
Definition spimax311.c:788